David Hutton has been a part of IBM Z’s Microprocessor and Nest Performance teams, and Microprocessor Design and Verification teams with Poughkeepsie Engineering for 26 years. In his current role he is a client-facing lab representative for system performance inquiries and critical situations worldwide and develops the Large Systems Performance Reference (LSPR) and the MIPS and MSUs ratings. He has led and co-developed five generations of IBM Z core performance models that have helped to shape processor hardware designs and supply projection data to brand and marketing. He is an IBM STSM and Master Inventor and has co-authored roughly 30 patents.